On Mon, 2009-05-11 at 08:53 -0400, Paul Davis wrote:
> However, notice that far more important from a performance perspective
> is that power-of-2 buffer sizes permit buffers to be cache line
> aligned, which as far as we know (its never been carefully measured)
> greatly outweighs the kinds of concerns you are mentioning.
a cache aligned buffer of 96 would easily fit in the same space as one
of 128, only with lower latency.
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Received on Mon May 11 20:15:01 2009
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