Re: [LAU] open hw soundcard

From: Karl Hammar <karl@email-addr-hidden>
Date: Mon Nov 16 2009 - 11:56:17 EET

Martin Peach:
> >> karl@email-addr-hidden (Karl Hammar) wrote:
...
> >>> If we are going to have multiple analog inputs at higt sample rate,
> >>> isn't it better to have a parallell interface. With spi the number of
> >>> channels will be limited to something like 8 for a 24bit converter.
> >>> Plus that the AT32AP7000/AT91SAM9260 only has two spi-busses.
...
> Another way to do that would be to bit-bang 8 SPI devices sharing one
> clock line (and /CS/FS) onto a byte-wide port, read all 8 in parallel
> one bit at a time in perfect sync.
>
> It actually should be possible to use a /RD line for an SPI clock, so 24
> successive reads of a single address would clock in 8 24-bit samples.

I tend to dislike bitbanging, but yes, that should be doable, something
like:

void read_all_adcs() {
  uint32_t adc[32]; // up to 32 adc converters
  int ix;
  int kx;
  uint32_t bits;

  chip_select(0);
  // the first few bits are to start converter
  bits = get_data();
  bits = get_data();
  bits = get_data();
  bits = get_data();
  bits = get_data();
  for (ix = 0; ix < 24; ix++) {
    bits = get_data();
    for (kx = 0; kx < 32; kx++) {
      adc[kx] <<= 1;
      adc[kx] |= bits & 1;
      bits >>= 1;
    }
  }
  chip_select(1);
}

I have to think about that. The big "but" would be that the clock
(the frequency of get_data()) should be stable, I don't know how much
variation is allowed.

Regards,
/Karl

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Karl Hammar Aspö Data karl@email-addr-hidden
Lilla Aspö 148 Networks
S-742 94 Östhammar +46 173 140 57 Computers
Sweden +46 70 511 97 84 Consulting
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Received on Mon Nov 16 12:15:04 2009

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