Re: [linux-audio-dev] HDSP 9652 minimum buffer size

Paul Davis <paul@email-addr-hidden>:
> >On Fri, 2005-04-15 at 18:18 +0200, Wolfgang Woehl wrote:
> >> Paul Davis <paul@email-addr-hidden>:
> >> > >What are the constraints for the HDSP 9652's apparent minimum
> >> > > buffer size of 64 frames? Is it the FPGA? Is it the firmware?
> >> >
> >> > whatever stuff is programmed into the FPGA and/or the rest of
> >> > the board, it cannot be set to generate interrupts at smaller
> >> > intervals than this.
> >>
> >> Paul, would you think it's worth trying to find out deeper detail
> >> on this? Me thinking if the 9652 can do 96khz/64 frames (1.33
> >> msecs) it can actually go quicker than the 44.1khz/64 frames (2.9
> >> msecs) setup. Is there any potential or would one only waste time?
> >
> >Well, what happens if you just change the driver to allow 44.1/32?
> > It's probably one or two lines of code.
>
> you guys are not understanding me. when you set the buffer size, you
> are setting a register value in the HDSP. the h/w doesn't understand
> any values lower than 64. in fact, it not only doesn't understand, it
> has no way to even request it.

Paul, from what I understand about the Spartan/FPGA on the HDSP board
almost anything the card can do is configurable. Is that not valid for
the specific register you mention?

It's obvious that RME sells the cards with a lower boundary of 64 frames
buffersize. Ok. Could it be that the reason to do this is to play it
safe, in order to have rock solid operation on just about every
platform? That this is not constrained technically?

Thanks in advance for any further information.
Wolfgang
Received on Tue Apr 19 16:15:09 2005